irclog2html for #openjtag on 20060113

00:53.36*** join/#openjtag ByronT (n=byron-po@nslu2-linux/ByronT)
01:01.47beewoolieulf_k_: I wonder if you are asking about the openwince jtag software
01:02.06beewoolievmaster: Are you on?
01:02.39ulf_k_hi beewoolie
01:02.51beewooliehi
01:06.29ulf_k_well later on i realized that openwince and openjtag are not the same
01:08.28lennertopenjtag isn't much, so far
01:08.44lennertnothing but untold megabytes of irc logs :)
01:08.59lennertand a bit of code here and there
01:15.59*** join/#openjtag vmaster_ (i=vmaster@p549B6E47.dip.t-dialin.net)
01:16.39beewoolielennert: Hi lennert
01:16.57beewoolielennert: I'm doing a timing test on the code as implemented in openwince
01:17.07beewoolieIt is interesting to note that the usleep function really blows.
01:17.54lennerthi beewoolie
01:17.54lennerthehe
01:18.04lennertpmc3386 driver from radisys did something like
01:18.17lennertos_linux_enp_udelay(int MicroSeconds)
01:18.18lennert{
01:18.21lennertint i;
01:18.29lennertfor (i=0;i<MicroSeconds*50000;i++)
01:18.29lennert;
01:18.29lennert}
01:18.37beewoolieUm, ....yeah.
01:18.49beewoolieIn a word...poop.
01:18.58lennerthell yeah
01:19.26beewoolieIt turns out that without a delay, we get about 268KHz.
01:19.39beewoolieMoreover, I am using a very different design from openwince.
01:19.41lennertparallel cble?
01:19.51beewoolieMy inner loop is much faster.
01:20.05beewoolieAt the moment, I'm testing the Xilinx III.
01:20.13beewoolieIt makes it possible for me to verify my code.
01:20.20lennertright
01:20.32lennerti could download the spartan3 via jtag at 700khz or so
01:20.39lennertbut i think that pc had a fast parallel port
01:20.50lennerthttp://svn.wantstofly.org/vhdl/utils/  (very incomplete)
01:21.16beewoolieWell, keep in mind that I'm looking at the clock signal.
01:21.28beewoolieThis doesn't say anything about the data throughput.
01:21.57lennerti'm still not 100% sure what you're doing.. are you running openwince and looking at TCK with a scope?
01:22.06beewoolieMoreover, I'm using the PPDEV interface which, I suspect, isn't as fast as the direct port access interface.
01:22.15beewoolieActually, no.
01:22.27beewoolieI'm working on code to manipulate the JTAG scan chains.
01:22.29lennertoh, yeah -- i'm just bitbanging the parallel port i/o ports from userspace (ugh ugh)
01:22.37beewoolieI can read registers and do lots of interesting things already.
01:22.48beewoolieI decided that I wanted to see what the throughput limit was.
01:23.07lennertso time how long an MMIO cycle takes?
01:23.08beewoolieWell, the goal is much grander.
01:23.21beewoolieMMIO?  I don't know what that means in this context.
01:23.33lennertsorry, not mmio
01:23.40lennerttime how long it takes to do a parallel port write, i mena
01:23.49lennertthat gives you the throughput limit
01:23.55lennertor am i still not understanding you correctly :-/
01:25.07beewoolieWell, the inner loop of this test is write clock high, write clock low, repeat.
01:25.16beewoolieI'm getting about 268KHz.
01:25.29lennertright, that's what i did too
01:25.30beewoolieI'm going to see what happens if I use the port directly without ppdev.
01:25.34lennerti got 700khz
01:25.41beewooliePerhaps your machine is faster.
01:25.48beewoolieAre you using ppdev?
01:25.54lennerttry http://svn.wantstofly.org/vhdl/utils/test_speed.c  ;-)
01:26.07lennertno, direct port i/o, which makes it much faster as it avoids the kernel round-trip
01:26.13lennertbut much less portable so not a good solution
01:26.28beewoolieUm, that code doesn't do anything.
01:26.35beewoolieWhatsa jtag_flush?
01:26.41lennertjtag.c should be called xilinx_parallel3_cable_specific_hacks.c
01:26.46lennertsee jtag.c in that directory
01:26.55lennerti'm ashamed to even show you this stuff
01:27.15beewoolieOK.  That's using the port directly.
01:27.33beewoolieI'm using the user-mode interface at the moment.  The code runs without root privileges.
01:27.45lennertwhich is a big plus
01:27.57beewoolieExcept that what we really care about is speed.
01:28.00lennerti'm just saying, if you want to benchmark pure port accesses you can use that
01:28.08lennertinstead of having to hack it up yourself
01:28.11lennertwell, true
01:28.13beewoolieI think I might look into using root to gain access to the port and then dropping priviledges.
01:28.21lennertyou need root then though
01:28.25beewoolieAh, right.
01:28.28lennertyou could use root if you have it and ppdev otherwise
01:28.38beewoolieOr, we can make the exec file be setuid.
01:29.17beewoolieLet me see what your code does...
01:30.14beewoolieIs this a subversion repo being exposed?
01:30.17lennertyes
01:30.24lennertyou can check it out with svn checkout http:// etc
01:30.27beewoolieAh,  Interesting.  I use subversion, but I've never exported anything.
01:30.35lennertmod_dav_subversion iirc
01:30.42beewoolieHmm.  let me try that...
01:30.44lennertplugs directly into apache
01:31.45beewoolieelf@cerise ~...lennert/utils > sudo ./test_speed
01:31.45beewoolieparallel jtag cable not installed
01:31.49beewoolieOoops.
01:31.55lennertit's not in lpt1?
01:31.56beewoolieI'll bet I know what it is.
01:32.32lennertmy digilent cable shorts some input and some output pin
01:32.34lennertso it checks that
01:33.04beewoolieIt just exits.
01:33.16lennertyeah
01:33.18lennertbluntly
01:34.21beewoolieUm, I don't get it.  Are you just timing the loop?
01:34.25lennertyeah
01:34.34beewoolieah.  I've got a scope on it....
01:34.46lennertyou can put a "tck ^= 1;" in the inner loop if you want
01:34.57lennertbut whether you write tck as 0 0 0 0 or 0 1 0 1 won't make difference in speed
01:35.02lennerti just use 'time' to time 16777216 writes
01:35.49beewoolieOK.  It's running at 326KHz.  Faster, but not twice as fast.  Interesting.
01:36.07lennertit depends a lot on your motherboard chipset
01:36.14beewoolieThanks.  That saved me some time.  I'll probably still support the direct access mode just for the fun of it.
01:36.19beewoolieHow is that?
01:36.20lennertspecifically, the 'distance' between your cpu and southbridge
01:36.29beewoolieIsn't this just a matter of the speed of the CPU?
01:36.32lennerti.e. how long it takes to do a write to a register in the southbridge
01:36.36lennertnooo, not at all
01:36.44lennertmy pentium 200 is likely faster at this than your p4 3.6ghz
01:36.49beewoolieInteresting.
01:36.59beewoolieThis is a notebook running at 1.6GHz.
01:37.07lennertfor ages, robert olsson fastest routing box was a supermicro 933mhz pentium iii
01:37.13beewoolieIt's not a p4.  It's a pentium M, I believe.
01:37.15lennertwhy?  because the pci access latency is so damn low.
01:37.25lennertit creamed the xeons in every test
01:37.37beewoolieI have a supermicro box, too.  It was really great, but the athlon 64 single proc was still faster.
01:37.48lennertin this test, the cpu is stalling thousands of cycles for each I/O port write.. it really is that slow.
01:37.48beewoolieAh.  Nice.  I like that company's machines.
01:38.00beewoolieI've been waiting for them to release a dual-proc AMD machine.
01:38.05beewoolie...that I can afford.
01:38.24lennert1.6 GHz / 326 kHz = a whopping 4907 cycles per parallel port i/o write
01:39.13lennertif i get one board i was hoping to get, i'll need a pci-express mobo to put it in
01:39.15beewoolieEven giving instructions 10 cycles per execute, we are at 500 to 1.
01:39.27lennertso i'll have to buy a new mobo, and might as well just buy a nice AMD box anyway
01:39.27beewoolieActually, 500 to 2 since we are writing twice.
01:39.55beewoolieThis also helps with understanding the real advantages of the USB dongle.
01:40.00lennertan i/o port write will likely break the pipeline completely and put the cpu in microcode
01:40.15lennertthat could be a couple hundred cycles
01:40.17beewoolieI don't see what you mean.
01:40.31beewoolieOh, you're saying that the IO itself is really really inefficient.
01:40.33lennertthen to get the write to the northbridge.. to the southbridge.. and wait for the ack
01:40.37lennertyes
01:40.40lennertthe i/o itself is dog slow
01:40.51beewooliethat's why memory mapped IO is so nice.
01:40.57lennertmost PC NICs use memory-mapped I/O (i.e. memory transactions instead of i/o transactions) because of that
01:41.00lennertyeah :)
01:41.13beewoolieThe port thing has been stupid for a really long time.
01:41.16lennertwell, on most embedded boards pci i/o is done with memory transactions anyway.. but that's a whole nother sotry
01:41.25beewoolieI can kinda see it when there is only 64K of address space.
01:41.31beewoolieRight.
01:41.38beewoolieThis IO port stuff is legacy.
01:41.40lennertyeah
01:41.48lennertand pc makers don't bother optimising i/o accesses at all
01:42.09lennert(not that pci memory latency is much better, but oh well...)
01:42.33lennertlatency has been steadily going down the tubes
01:42.43lennertbandwidth keeps improving by leaps and bounds, but latency..
01:42.48lennertlatency of latency
01:42.53lennerts/of/oh/
01:43.47beewoolieIt's really killing us.
01:43.56beewoolieMakes it even more important to get more cores.
01:44.46lennertso that we can sacrifice half of the cores to stalling on i/o :)
01:44.59beewoolieRight!
01:45.01lennertand the other ones to our firewall software and virus and malware scanners
01:45.14lennertand Word will still run slow
01:45.15beewoolieMore cores!  More cores!  Bring on the cores!!!!!
01:45.24lennerthaha
01:45.25beewoolieCORES CORES CORES
01:45.29lennerti'm all for more processing power :)
01:45.32beewoolieSPAM SPAM SPAM SPAM....
01:45.46lennert:))
01:45.48beewoolieWonderful cores!  Wonderful cores!
01:46.10lennertget your cheap cores!  $100 a hundred!
01:46.14beewoolieI saw an interesting link about a really small power supply...
01:46.52lennerta power supply for each core? :)
01:47.10beewoolieLooking...
01:47.15lennerti'm very interesting in efficient hardware
01:47.21lennerts/interesting/interested/
01:47.22beewooliehttp://www.bit-tech.net/news/2006/01/07/pico_psu/
01:47.36beewoolieWhat I don't get is why this is interesting.
01:47.51lennertbefore i got the epia i was thinking about making my internet gateway an arm box
01:48.13lennert120 watt.. damn, pretty small thing
01:48.20beewoolieThat's been on my agenda, too.  I got close, but the slug crashes.
01:48.35beewoolie10A at 12V is OK by me.
01:48.36lennertand my slug has amnesia
01:48.48lennerti was thinking of a simtec atx or mini-itx board
01:48.59lennertbut in the end the epia was cheaper, and doesn't draw much more power anyway
01:49.36beewoolieI've been most interested in low power -> low noise.
01:49.42lennertsame
01:49.51lennertmy previous box was a dual xeon
01:50.03lennertbooting it was like firing up a jet
01:50.46beewoolieMy most common maintenance task has been replacing fans.
01:51.45lennerti have an atx-size case with 4x200g disks and i just don't know how to keep it cool other than leaving the side panels off and pointing a big desk fan at it
01:52.21lennertthe epia board has a fan on the cpu, but since it's a 1.0ghz and i always run it at 500mhz, and since the psu fan _and_ the case fan blow/suck the exact area where the cpu, i can probably rip the cpu fan off
01:52.43lennert(epia is a different box)
03:23.31*** join/#openjtag dyoung-away (n=dyoung@nslu2-linux/dyoung)
05:26.41beewoolieQuiet day.
05:29.15ka6sox-laptopya...Hi beewoolie
05:29.22beewoolieka6sox-laptop: Hey man.
05:29.40ka6sox-laptopare you able to get all the parts for ep1220's interface?
05:29.43beewoolieka6sox-laptop: Did I tell you I repaired the JTAG you sent me?
05:29.51ka6sox-laptopwhat was wrong with it?
05:29.54beewoolieka6sox-laptop: I'm waiting on a resistor, of all things.
05:30.00ka6sox-laptopha!
05:30.02beewoolieOne of the resistors on the device failed.
05:30.07beewoolieIt broke in two.
05:30.14ka6sox-laptopweird.
05:30.20beewoolieI replaced it with one from the most recent order.
05:30.21ka6sox-laptopthanks for fixing it.
05:30.35beewoolieLuckily I bought a couple extras...erm...194 extras.
05:30.57ka6sox-laptopha ha!
05:30.59ka6sox-laptopthats funny.
05:30.59beewoolieNP.  It was kinda cool that I figured it out.  I mean, I'm no wizz with the hardware.
05:31.10beewoolieIt was only $3 for 200.
05:31.23beewoolieOr, may be $4.  Still, hardly worth buying anything less.
05:31.28ka6sox-laptopya
05:31.43beewoolieI've been using it to write JTAG code.
05:31.51beewoolieIt's interesting how the thing is setup.
05:31.56beewoolieMostly, it works without too much hassle.
05:31.58ka6sox-laptopare you using linux for fpga stuff?
05:32.10beewoolieThere are somethings I don't yet understand.
05:32.11ka6sox-laptop(ie the ISE in Linux?)
05:32.27beewoolieka6sox-laptop: No, I'm working to replace the functionality of the BDI.
05:33.01ka6sox-laptopw00t! thats what I want too!
05:33.07beewoolieISE...um...International Securities and Exchange?
05:33.20beewoolieYeah.  I'm at the stage of reading lots of scan chains.
05:33.24ka6sox-laptopthe FPGA developement environment.
05:33.53beewoolieI'm not yet sure how to get access to system registers.  I suspect I need to send ARM instructions over one of the JTAG chanins.
05:33.56beewoolieAh.
05:34.10beewoolieI don't think I need to learn yet another set of skills...right now.
05:34.24beewoolieI'm OK with getting some high qwality JTAG going.
05:34.28ka6sox-laptopI hope to use the S3e and ep1220's board.
05:35.45beewoolieInteresting note, the fastest we can signal from my laptop is about 260KHz.
05:36.19ka6sox-laptopnot very fast.
05:36.23beewoolieWith the parallel interface.
05:36.26beewoolieNo, not fast.
05:36.28beewoolieThat's without delays.
05:36.53beewoolieAlso, I now know why the openwince code suxks so badly when we change the frequency.
05:37.07ka6sox-laptopoh? why?
05:37.20beewoolieThe usleep () call they use to slow down signaling makes the frequency no greater than 250Hz.
05:37.39beewoolieSound familiar.  Yep, that's the 10ms limit to the jiffies timer.
05:37.47ka6sox-laptopheh
05:38.01beewoolieIn order to make the signaling more adjustable, I'll have to do something fancier.
05:38.14beewoolieLike the bogomips loop.
05:38.57beewoolieAlso, openwince is really dumb about detecting cores.
05:39.02ka6sox-laptopI remember playing with this when we were trying to figure out why the Slugs were sooooo slow.
05:39.12beewoolieIf there is nothing on the chain, it takes a really long time to detect it.
05:39.39beewoolieAre you referring to our speed-up of the slug?  or of the sluggish upload over jtag?
05:39.45beewoolieno pun meant.
05:39.56ka6sox-laptopthe slugs were running at 1/2 speed.
05:40.03beewoolieRight.
05:40.09beewoolieThat's was a welcome discovery.
05:40.33ka6sox-laptopokay so if we use the S3e to do the heavy lifting of talking to the chains.
05:40.47beewoolieit turns out that methods for dealing with the IXP core are quite different from methods using on the others.  I'm been working with an ARM9 since I have so many.
05:41.05beewoolieyeah. it would be awesome to get somthing that could signal as fast as 40MHz.
05:41.31beewoolieMy code is being designed to construct buffers of signals.  I compose a command list and then process it by a driver.
05:41.41beewoolieI mean, it is designed that way.
05:41.50beewoolieIt works pretty well and the code is really simple.
05:42.09beewoolieThe next phase will be to get the USB chip to accept a translation of these commands.
05:43.07ka6sox-laptopcool
05:45.29ka6sox-laptopeven if we come up with replacement hardware (for the BDI) we still will need a good user interface :)
05:46.03ka6sox-laptopthe EP1220 boards are essential to allow it to be universal.
05:48.28beewoolieThere is a bothersome ommission on his design.
05:48.31beewoolieWe really need sRST.
05:48.36beewoolienSRST.
05:48.51beewoolieI hope that there is a extra GPIO line we can commandeer.
05:49.02ka6sox-laptopthis is the first rev...and I think that I can make that work with the S3e
05:49.12ka6sox-laptopI hope to have mine in Feb.
05:49.17beewoolieGreat.  
05:49.28beewoolieYou mean, you expect an S3e in Feburary?
05:50.41ka6sox-laptopyes
05:50.53ka6sox-laptopI already have the board from EP1220
05:51.00ka6sox-laptopthey are really nice.
05:53.47ka6sox-laptopnext time we see him I need to get with him.
05:57.12beewoolieHave you met him before?
05:57.32ka6sox-laptopno...we have just spoken here and via email :)
05:57.54beewoolieI look forward to the day we have our first conference.
05:58.23ka6sox-laptopthat would be fun.
05:59.31ka6sox-laptopI think that I'll be able to get a Schematic for the S3e board real soon now :) I need it so that I can start working with the memory controller.
05:59.47ka6sox-laptopthey have 32MB of sdram on board.
06:01.23beewoolieThat ought to be plenty.
06:01.49beewoolieIt would be handy to come up with a protocol so that the S3e could be somewhat autonomous.
06:03.00ka6sox-laptopthats what I want to do.
06:03.30ka6sox-laptopmake it so that we can set breakpoints and do other things with the S3e being a little independent.
06:03.57beewoolieOne of the things I've toyed with is code to follow the state of the TAP.  That's what the openwince version does.
06:03.58beewoolieHowever, I've not found it necessary.
06:04.16beewoolieActually, I was thinking that the S3e would only know about JTAG.  The details of how debugging is done with be handled by the host.
06:04.31beewoolieIf we want to put the debug info into the device, we'll have to specialize for every target.
06:04.47beewoolieOn the other hand, the JTAG scanning is standardized.
06:04.51ka6sox-laptopyep
06:04.53beewoolieAll we need to do is feed it commands.
06:05.00ka6sox-laptopokay lets start simple :)
06:05.07beewoolieThe handy thing would be an ability to download fragments and call them out.
06:05.16ka6sox-laptop1st thing is FAST programming
06:05.20beewoolieThere is a 'reset TAP' fragment that is really obvious.
06:05.32beewoolieOthers require scanning through several chains to get a result.
06:05.35beewoolieMacro-like.
06:05.39beewoolieRight.
06:05.44ka6sox-laptopthen 2ond we can start scanning the chain for things :
06:05.49beewoolieOK, here's my idea for that.
06:06.11beewoolieThere is a 32 bit port available on the ARM cores.
06:06.17beewoolieWe can send data back and forth.
06:06.34beewoolieWell, we could write a program for the ARM that looks at this port and writes the data to flash.
06:06.57beewoolieIt adds an extra step, but it allows us to program as fast as the device can go.
06:07.26beewoolieIt also means that we don't have to write anything more that the data to program into the device.
06:07.57beewooliePlus, the program running on the core can buffer data, overlapping IO with the JTAG device with programming to flash.
06:08.17beewoolieIf we make it possible to perform buffered writes, we should be able to go blazing fast.
06:08.40beewoolieThe really slick method for doing this would be to put the code into cache.
06:08.49beewoolieThen, we wouldn't even need RAM.
06:12.10beewoolieNice chatting.
06:12.20*** part/#openjtag beewoolie (n=beewooli@206.124.142.26)
07:17.46*** join/#openjtag dyoung-a1ay (n=dyoung@cpe-24-94-88-62.hawaii.res.rr.com)
08:18.39ka6sox-laptop[23:07] <ka6sox-laptop>they mis labeled the package and therefore they sent it the "wong way"
08:18.39ka6sox-laptop[23:07] <ka6sox-laptop>er wrong way!
08:18.39ka6sox-laptop[23:08] <ka6sox-laptop>we need to call 800-622-4205 (between 7am and 6pm CST) to complain and ask for the shipping charges back.
08:18.39ka6sox-laptop[23:08] <ka6sox-laptop>they *will* deliver the package tommorrow.
08:18.41ka6sox-laptop[23:08] <ka6sox-laptop>it has been re-routed to Goleta and they did verify my address and phone number.
08:18.43ka6sox-laptop[23:28] <--dyoung-away has quit (Read error: 110 (Connection timed out))
08:18.46ka6sox-laptopeeek
08:48.50*** part/#openjtag NAiL (n=repvik@nslu2-linux/pdpc.active.repvik)
10:35.02dyoung-awayHmm, okay
10:35.20dyoung-awayI have a feeling that was for a differnt window eh. :-)
10:36.07dyoung-awaySounds good though.  
10:36.19dyoung-awayI wonder if you can call for me; or if I need to do it.
10:36.26dyoung-awayI gotta pack
11:27.56*** join/#openjtag GyrosGeier (n=richter@p549960E4.dip.t-dialin.net)
11:49.09lennerthehe
11:54.26dyoung-awayHi Lennert.
11:54.43lennerthi dyoung-away
11:54.47lennerthow is it?
11:55.02dyoung-awayWhen you absolutely need to lose a package overnight, use Fedex !
11:55.14lennertor DHL
11:55.17lennertany will do, really
11:55.22dyoung-awayheh heh
11:55.31dyoung-awayDoing ok
11:55.32lennertDroppit Hideit Loseit
11:55.50dyoung-awayhaving trouble keeping up with all the new developments.
11:55.58lennertnew developments?
11:56.08dyoung-awayoh, all of them.
11:56.15lennertname them ;)
11:56.17dyoung-awaythe whole debian debicle.
11:56.21lennertoh, that
11:56.34lennertwell, at least all our work is now obsolete ;-)
11:56.34dyoung-awayetc, etc...
11:56.47dyoung-awaySeems so eh?
11:56.52lennertyeah
11:57.02dyoung-awayThats okay. I still use.
11:57.12lennertand me
11:57.21dyoung-awayJust for Fun we should do Etch too.
11:57.26lennertyeah
11:57.32lennertjust to show 'em :P
11:57.52dyoung-awayYep, and while we're at it, Ubuntu with EABI.
11:57.54dyoung-awayheh
11:58.02lennerthehe
11:58.10lennerteabi with gcc 4.0 is a no-go
11:58.24dyoung-awayWe should proably follow up on the security stuff at some point....
11:58.27lennertand.. all gcc 4.1 snapshots i tried don't build right for me
11:58.37lennertindeed
11:58.42*** join/#openjtag ka6sox (n=ka6sox@nslu2-linux/ka6sox)
11:58.54dyoung-awayYeah, I'm kind of having my own personal toolchain nightmare myself.
11:59.13dyoung-awaybut on the plus side, I got Xen working just how I like it with instances for cross33 and cross34
11:59.21lennertreally?  what nightmare?
11:59.46dyoung-awayIts proably user error.
12:00.09lennertthat's what i kept thinking with gcc 4.0/4.1
12:00.23lennertbut as it turns out, gcc 4.0 only has a part of the eabi bits needed
12:00.35lennertand the 'eabi' binaries it produces aren't eabi in any way apart from insignificant ways
12:00.47dyoung-awayhmmpf.  so 3.4 is the latest EABI workable version ?
12:00.47lennerts/from/from some/
12:00.57lennert3.4 needs codesourcery patches
12:01.10dyoung-awayAt least they are available.
12:01.13lennert3.4-out-of-the-box doesn't know about eabi
12:01.22lennerttrue, but sarge uses 3.3 and sid uses >= 4.0
12:02.12dyoung-awayoh well.
12:02.18dyoung-awayGuess we suck. :P
12:02.28lennertyeah
12:02.38lennertwe do :P
12:03.05dyoung-away"Beaten Paths are for Beaten Men."
12:03.05dyoung-awayI aint beat yet.
12:03.11lennerthehe
12:03.21lennert"i can will it all away."  :-)
12:03.48dyoung-awayI'm throwing in the towel on recycled disks though
12:04.16dyoung-awayI'll have a nslu2 with disk for special builds, but I think its all going to be NFS root from now.
12:04.28dyoung-awayI ate like 6 disks.
12:04.40dyoung-awayor rather sarge did...
12:05.04*** join/#openjtag bullet (n=bullet@189.51.203.62.cust.bluewin.ch)
12:05.24lennert"sarge ate my disks!"
12:05.33lennertand now it's declared obsolete
12:05.37lennertdid the disks die in vain??
12:05.56dyoung-awayKinda looks that way.
12:06.20dyoung-awayI was trying to make a sad looking sculpture out of them; but its not quite enough to do something cool
12:06.29lennerthmmm
12:07.02lennertnot sure what to do with them either
12:07.13lennertmaybe just the disks themselves can be turned into an exhibition
12:07.36lennertsome small looking rectangular object with "The Bone Grinder" written on it is sure to attract _some_ interest
12:10.58dyoung-awayhhe
12:11.16dyoung-awayIf I take um all apart, there should be enough stuff to make something cool looking
12:11.51lennerta number of packages don't build on nfs root, though
12:12.00lennertmostly anything that uses db3 or db4, it seems
12:12.12lennertprobably because my nfs root setup has nonexistent file locking
12:12.19dyoung-awayYeah, thats what the one special nslu2 will be fore....
12:12.41lennertit would be nice to have a small ramdisk that can do a 'proper' nfs mount, pivot into that, and dissolve itself from existence
12:13.22dyoung-awayLuckily, thats how the nfsroot works under OpenSlug and friends.
12:13.27lennertgreat
12:13.30dyoung-awayit boots the internal ramdisk first.
12:13.37lennertthe kernel nfs root sucks
12:14.08dyoung-awayIts on my todo list. :-)
12:14.20dyoung-awayI'm really stoked about Xen btw.
12:14.26lennertstoked = ?
12:14.32lennertexcited or pissed off? :)
12:14.47lennert!dict stoked
12:15.20dyoung-awayfeeling of elatement?
12:15.25dyoung-awayIts a good word
12:15.39dyoung-awaysorry, thats a surfer word
12:16.09dyoung-awayWhen you have a really good wave, "I was stoked about that last ride!"
12:18.28lennertah, okay
12:18.32lennertstoked
12:18.38lennerti'll remember that word
12:19.21dyoung-awayI just assumed the meaning was well known, as all my french friends knonw it; but theyre all surfers. :-)
12:19.38lennerthehe
12:19.46lennertwell, i had never heard it before
12:19.59lennertexcept as a last name, 'Stoker'  :)
12:20.15dyoung-away0220.
12:20.16lennerti only woke up like half an hour ago
12:20.24lennert02:20 PM here
12:20.32lennertso it's 01:20 in holland
12:20.32dyoung-awayfunny how that works. :-)
12:20.36lennerthehe
12:20.42lennerti went to bed at 06:00
12:20.46lennertreading ixp23xx documentation
12:20.48dyoung-awaymy new years resolution is to do something cool with the S3
12:21.09dyoung-awayCollecting Dust isnt cool.
12:21.31lennerti might might might might get an ixp23xx loaner board
12:21.38dyoung-awayI'm kind of dead in the water atm because my T42 caught fire.
12:21.45lennertt42?  calculator?
12:21.55dyoung-awayIBM ThinkPad T42.
12:22.00lennertoooh
12:22.02lennertthat sucks
12:22.05dyoung-awayIt didnt really catch fire, but all this smoke was pouring out of it
12:22.07lennertjust the power supply, or something more vital?
12:22.19dyoung-awayI think it was the fan controller.
12:22.22dyoung-awayor something with the fan.
12:22.34lennertif you plug it back in it starts smoking again?
12:22.42lennertsee, smoking is bad for your health
12:22.56dyoung-awayIf I turn it on, it immediately says Fan Error.
12:23.14lennertand then you say "Tell me something new." and it continues booting?
12:23.15dyoung-awayOnce I had let the Magic Blue Smoke out, it was done.
12:23.23dyoung-awayNo, it turns itself off
12:23.29lennertoh
12:24.14dyoung-awayIn a strange twist of happenstance, ByronT's T42 fan broke like 3 days after mine croaked.
12:24.14lennertheh
12:24.19dyoung-awayI think he got his a little bit after me.
12:24.37lennertsame series?
12:24.38dyoung-awayThe next guy from around here that has a T42 is jacques.
12:24.50lennerttell him to make backups NOW :)
12:24.57dyoung-awayso if his fan goes funny, we know theres a issue. :-)
12:24.59bulletheh, i've got a t41p!
12:25.11bulletand it's still running non-smoking
12:25.43lennertbullet: lucky bastard :)
12:25.48dyoung-awayI kind of wish I had a voice recorder or something, I'm pretty sure I emitted some pretty choice words.
12:26.08bullethehe. well, a friend of mine has a t42p, and it's display went black two weeks ago
12:26.25lennert'choice words'
12:26.38lennertBEEP BEEP BEEP
12:26.54dyoung-awayyou BEEPING BEEP of BEEP
12:26.57dyoung-awayholy BEEP
12:27.04dyoung-awaywhat BEEP BEEEP BEEEEEEEEEEEEEEEEEEP
12:27.09lennertyou BEEEEEP fornicator
12:27.45dyoung-awayI was thinking earlier its probably a sign to move to the Linux WebPack.
12:27.54dyoung-awayAnd that was actually part of my motivation to Xen-ify.
12:28.06lennerti love xen
12:28.25lennerti scored a linux version of ISE that i'm now happily using
12:28.32dyoung-awayWow
12:28.48lennerti wrote an fm modulator to drive the vga dac on the xupv2p board.. :P
12:28.52dyoung-awaydoes the foo-XUP target work with your version ?
12:29.00lennertfoo-xup?
12:29.07dyoung-awayhehe what you just said.
12:29.11dyoung-awayXUPV2P
12:29.18dyoung-awaycouldnt remember the model. :-)
12:29.21lennertxupv2p?  well, it can synthesize for the xc2vp30, which is what's on that board
12:29.44lennerti also got the fscking SystemACE figured out
12:30.21dyoung-awayI need to catch up with you
12:30.38dyoung-awayat this point I basically dont know what the eff I'm doing.
12:30.51lennert(the systemace is a device you hook into your jtag chain, and it's normally transparent, but you can tell it to program the devices on the 'inner' half of the jtag chain from a .ace file on a compactflash)
12:31.29lennertyou need to understand the.. what, 3 basic vhdl constructs, and how they translate to flipflops
12:31.53lennertafter that, it's a lot of code writing
12:31.55dyoung-awayYeah, I had to dump my VHDL knowledge to make space for other crap.
12:32.05dyoung-awayso I need to just start from scratch.
12:32.05lennertdon't read any vhdl, most of what's out there is crap :-)
12:32.50dyoung-awayOkay.
12:32.54dyoung-awayheh
12:32.59lennertmine is crap too
12:33.13lennerti like to believe you have to develop your own style..
12:33.23lennert..and then when you're proficient enough, dump all of that once again :)
12:35.25dyoung-awaylennert: I'm going on holiday tommrow.  I'll be back on the 23rd.
12:35.35lennertokay
12:35.40lennertand you won't have internet access, i guess? :)
12:35.44dyoung-awaywe should probably talk then a little bit about "The Plan"
12:35.53lennerti'm coming back home next monday
12:35.57lennertyeah.. 'the plan'
12:36.02dyoung-awayI might have internet access... dunno yet.
12:36.11dyoung-awayI'm not taking a laptop since it caught fire. :-)
12:37.52lennertmaybe some snow will do it some good :)
12:42.38dyoung-awayHehe.  That irritates me, I cant use my T42 in Antartica just because my fan doesnt spin.
12:42.41dyoung-awayoh well.
12:42.54lennertlol
12:43.14lennertthey should let you rip out the fan when ambient is under -10C, i think ;-)
12:46.50vmasterloool
13:03.02*** join/#openjtag prpplague (n=billybob@72.22.152.142)
14:52.42*** join/#openjtag ByronT_ (n=byron-po@nslu2-linux/ByronT)
15:03.34*** join/#openjtag ByronT (n=byron-po@nslu2-linux/ByronT)
15:17.53GyrosGeierHrm
15:18.10GyrosGeierI need a tool to diff two binaries as opcodes
15:21.44lennertobjdump/diff no good?
15:33.16*** join/#openjtag kas11 (n=kas11@244-120.8-67.tampabay.res.rr.com)
15:34.37kas11good mawnin', everyone...I see most all of the usual suspects here :)
15:39.06lennertgood yawnin'
15:43.37kas11;) @ lennert
15:43.50GyrosGeierlennert, no, as diff cannot be told to ignore addresses
15:44.21GyrosGeierlennert, and there have been instructions inserted/deleted
15:48.42lennertdelete the addresses with sed or somesuch?
15:56.06[g2]ka6sox around ?
15:56.32prpplaguekas11: suspects? am i being profiled?
15:57.40*** join/#openjtag ByronT (n=byron-po@nslu2-linux/ByronT)
16:06.22[g2]lennert hey
16:06.28lennerthey gee two
16:06.28[g2]are you at fosdem ?
16:06.42lennertnot right now :)
16:06.51[g2]is that this week ?
16:06.52lennertbut i'm going there, yeah (at the end of february)
16:06.57lennert26-27-28 feb i think
16:07.06[g2]ah
16:07.10lennertwhy so?
16:07.59[g2]I had the mistaken idea it was going on now
16:09.08lennertanyone here going to fosdem?
16:14.15GyrosGeierif I can find a place to stay
16:14.24GyrosGeieranyone going to Embedded World?
16:14.44prpplaguenot me, i have no budget this year for conferences
16:15.10vmasteri'll be at the embedded
16:15.16GyrosGeierEW is a trade fair, so it even makes less sense to go there unless you happen to be in the business
16:15.59vmasterhall 11, booth 112, iirc
16:17.12lennert112 is the european 911 :)
16:17.49vmasterhehehe, yeah
16:18.01lennertyou'll be doing emergency services? :)
16:18.33vmasterno, not really - presenting the OpenOCD
16:18.58vmasterit's a shared booth of german universities
16:19.51GyrosGeierhall 12, booth 508
17:07.29ulf_k_hi
17:07.36lennerthello
17:08.18ulf_k_a question to the super gurus of you all, what is a lattice lc4032v for?
17:08.33vmastera small cpld
17:08.55ulf_k_can it used to write to a flashchip?
17:09.11lennertprobably, yes
17:09.17lennertif you program it :)
17:09.25ulf_k_if you have a second of time can you look this picture:
17:09.50ulf_k_http://www.wlanhain.de/morewireless/hardware/dwl-7000/dwl-7000.jpg
17:10.25ulf_k_there is a jtag iface as well a smal iface near by the lattice
17:11.15lennertwhere?
17:11.19lennert(i'm looking at the picture now)
17:11.30vmasteri can see the jtag header, but what small interface do you mean?
17:11.39vmasterah
17:11.40vmasterok
17:11.47vmastertop-right corner, lennert
17:11.53ulf_k_yes
17:11.56lennertright
17:12.00lennert8 pin header, 1 pin missing
17:12.04ulf_k_the other corner is serial
17:12.20vmasterthe 8-pin header looks like a lattice isp layout
17:12.29vmasterthat's jtag, too
17:12.34vmasterthe 20-pin layout is arm
17:12.41lennertyeah
17:12.42ulf_k_aha
17:12.46vmasterdidn't we talk about this a few months ago?
17:12.52ulf_k_yes
17:13.43vmasterget the lattice datasheet, identify the tdi/tdo pins, and see if there's a connection between the 8-pin header and the tdi/o pins
17:14.12*** join/#openjtag dwery (n=dwery@nslu2-linux/dwery)
17:14.13ulf_k_well i have 5 of this boards, now i set up 3 on the roof with org. firmware running from dlink, they are wonderfull, so fast in 80211 a with wds and turbo a
17:15.01ulf_k_because they are very good wifis i decided to look again to hack this for running linux
17:16.11ulf_k_these 8pin (7only printed) sre somehow attached to the lattice
17:22.02[g2]ulf_k_ that's got an IXP in there right ?
17:31.07ulf_k_ixp 420ab
17:46.13*** join/#openjtag wookey_ (n=wookey@217.147.92.89)
17:46.36wookey_I recognise a lot of these names :-)
17:47.28prpplaguewookey_: greetings
17:47.33lennerthello wookey_
17:47.47*** join/#openjtag AchiestDragon (n=dave@whipy.demon.co.uk)
17:49.08prpplaguewookey_: what brings you to our neck of the woods?
17:49.09[g2]wookey_ welcome
17:49.19wookey_what is this blackdog thing then
17:49.53wookey_you need some hardware on the end of the wire in order to do JTAG fast enough?
17:50.00[g2]Realm Systems is trying to make an enterprise biometric device
17:50.24[g2]the released project blackdog to try and get open sourcer's on board
17:50.30wookey_prpplague: g2 just told me I would be interested
17:50.39wookey_he is right
17:50.44[g2]and offered $75K in prize money
17:51.04prpplaguehttp://www.linuxdevices.com/news/NS8980836353.html
17:51.07wookey_that's a good way to get some attention
17:51.34[g2]it's like Janet Jackson at the super bowl
17:51.40[g2]short term attention
17:51.51prpplaguehehe
17:52.04[g2]that that all short term attention is _bad_ :)
17:52.34[g2]So the blackdog has a PPC hard core in the FPGA and usb 2.0
17:52.51[g2]it can connect to windows and supossedly to linux via USB-NET
17:53.14[g2]there's a MMC expansion and it runs Sarge on the PPC hard core
17:53.36[g2]I think it's got 64MB ram and 256 or 512 MB flash on board
17:53.47lennerti tried sarge ppc but that didn't run on my v2pro
17:53.56lennertsomething with floating point
17:54.08lennertso they're using a custom version, hm?
17:54.09[g2]based on configuration option plus a biometeric finger print board
17:54.22[g2]they released a QEMU kit
17:54.26prpplaguei wonder what they are using for minuetia comparisons
17:54.29[g2]and It runs when I plug it into the PC
17:54.38prpplaguei've not found any OSS apps that do very well
17:55.22[g2]wookey_ so with the blackdog, I think we could connect it to an USB 2.0 linux host, a laptop or loft or what ever
17:55.47[g2]and then reprogram the FPGA to use the MMC connections to drive high speed JTAG
17:56.08prpplague[g2]: nice
17:56.10[g2]That would work as a proto
17:56.32[g2]I've talked to Realm a while ago and are interested in OEMing later this year
17:56.44wookey_OK that makes sense.
17:56.48[g2]or we could just layout and build our own board
17:56.58wookey_balloon3 has a built-in FPGA which is good for this sort of thing
17:57.20[g2]but a $199 for the 256MB version it's easier (and way cheaper) to just buy Blackdogs and plug them in
17:57.55[g2]is the B3 shipping and what kinda FPGA is on there ?
17:58.03wookey_well I was thinking that loft+blackdog is more than just balloon
17:58.35wookey_but no its not shipping yet - prototypes this month/feb so it'll be a while before stuff actually works
17:58.54[g2]well the thing about the Loft is that you could send these out to all the production facilities and control them via VPN or they could dump info to your site
17:59.27vmasterah, wookey, you're from aleph1, right?
18:00.28wookey_Indeed - I'm just trying to understand why 2 computers is easier than one here (beyond expediency in terms of getting somthing up asap)
18:00.28wookey_vmaster: I am
18:00.28wookey_I suppose in practice you have to plug it into something (which would normally be a PC)
18:00.28[g2]wookey_ here's why I'd spilt it that way
18:00.41[g2]you just said it
18:00.49[g2]the front end can vary
18:01.02wookey_makes sense.
18:01.17[g2]A loft would just a simple platform my there are _many_  even a NSLU2
18:01.46[g2]I think you might want multiple dongles too
18:01.53[g2]like 32 or even 64
18:02.09[g2]then you could test boards in parallel
18:02.23wookey_there is presumably a speed issue - jtag needs quite a lot f data (which is why it's bloody slow down a parallel port)
18:02.41vmasterdepends on how you use it
18:02.48wookey_I have no idea how much data and thus whether 32 dongles would need a lot of bandwidth?
18:02.48[g2]vmaster exactly
18:03.22[g2]well that's part of the beauty of the Blackdog which has a hardcore local to the FPGA
18:03.46vmasterif you want speed, you have to use the debug facilites provided by your target - using the openwince approach would kill a multi-mhz speed performance wise, too
18:03.52[g2]wookey_ the Ballons are open right ?
18:04.03wookey_[g2]: yep
18:04.09wookey_you can build your own
18:04.14[g2]we could probably get the netlist for the V1 or V2 to use as an example
18:04.25[g2]or even help debug and setup the V3
18:04.37wookey_that sounds good.
18:05.03[g2]that's ARM9 based right ?
18:05.13wookey_OK. I'll try and get you a netlist to play with shall I?
18:05.28wookey_xscale
18:05.28[g2]not yet
18:05.37[g2]YUMMY
18:05.48[g2]255 ?
18:05.52[g2]PXA255
18:06.14prpplaguewookey_: we've been experimenting with a wide range of solutions for doing jtag here
18:06.30prpplaguewookey_: most of what we have come to realize is what [g2] is covering
18:06.36wookey_where's here?
18:06.41prpplagueopenjtag
18:06.42vmaster#openjtag
18:06.46wookey_g2 yes
18:07.41[g2]do anybody know if the xscale cores are any different for JTAG between the PXA and IXP lines ?
18:08.11vmasteryou'll need a different debug handler for each one of them
18:08.25vmasterbut the hardware properties are the same
18:08.34[g2]vmaster sure but this is more for BSDL
18:09.10[g2]BSDL and Flashing initially
18:09.23[g2]and all the horsepower to support debugging later
18:09.40[g2]I'd think that beewoolie would be fine with this
18:10.00wookey_all I know is xscale has a 32K debug zone intended for JTAG access built-in
18:10.05prpplaguewookey_: the ez-usb stuff can be reprogrammed fairly easy to do jtag, but the throughput doesn't come close to a dedicated device - http://www.elinux.org/wiki/EzUsb
18:10.15[g2]and we can even possibly plug ep1220/other device into the blackdog for the level shifting / FPGA front-end
18:11.31[g2]prpplague there are lots of different solutions to many different issues we are all facing
18:11.40prpplague[g2]: yep
18:11.55prpplague[g2]: although the blackdog idea sounds intriging
18:12.11[g2]prpplague I think that'd just be a POC/proto
18:12.31[g2]there are lots of different areas and to me the FPGA programming is the biggest risk
18:13.08lennertwhy risk?
18:13.34wookey_[g2]: I know the engineering dept here (Cambrdige) is very keen on the FPGA thing) - that's why there is one on balloon3
18:13.57wookey_we might be able to get them interested in this as part of their 'multidisciplinary design project'
18:14.01[g2]wookey_ you may have the contacts to get the FPGA side done
18:14.07wookey_also in association with MIT
18:14.23[g2]quite possible
18:14.34wookey_see http://www-mdp.eng.cam.ac.uk/index.html
18:14.35[g2]I was thinking about just contracting a FPGA programmer
18:14.44wookey_for bullshit about the project (which balloon is part of)
18:14.46[g2]but there are many different solutions
18:15.13wookey_they have quite a lot of student-power available if they are enthused about something
18:15.28wookey_not always best quality, but you get smart people very cheap
18:16.42wookey_[g2]: are you coming to mexico debconf?
18:17.02[g2]I didn't know there was a mexican debconf
18:17.07wookey_it being relatively close...
18:17.11wookey_this may
18:17.20[g2]cool when ?
18:17.50wookey_http://debconf.org/
18:18.10[g2]do i have to be a DD ?
18:18.14wookey_nope
18:18.24[g2]or does having a buildd machine count ? :)
18:18.26*** join/#openjtag beewoolie-afk (n=beewooli@206.124.142.26)
18:18.32wookey_Very cool way to actually meet a load people and talk about stuff
18:18.42wookey_And do some hacking
18:19.28[g2]hopefully we'll be _done_ by may :)
18:19.35prpplaguebeewoolie-afk: speak of the devil
18:19.35wookey_Indeed, but the bandwidth of standing in the same place is good
18:19.46beewoolie-afkMornin.
18:20.05beewoolie-afkDid I hear a deadline?
18:20.24wookey_yep - deadlines make the world go round
18:22.39[g2]beewoolie-afk hey
18:22.49[g2]beewoolie-afk you know wookey_ right ?
18:22.50beewoolie-afk[g2]: hey man.
18:22.54beewoolie-afkHaven't met
18:23.00beewoolie-afkwookey_: Pleased to meet you.
18:23.23[g2]beewoolie-afk you know the Balloon hw right ?
18:23.36beewoolie-afkURL?
18:23.53prpplaguehttp://www.aleph1.co.uk/armlinux/index.html
18:24.02prpplaguehehe i have it bookmarked
18:24.06[g2]heh
18:24.31[g2]wookey_ at aleph1
18:24.40[g2]s/at/is at/
18:25.02[g2]it's an open board and they working on a V3 now
18:25.03beewoolie-afkThat's one of the DEC parts, right?
18:25.19[g2]the new one has a PXA255 on it
18:25.35beewoolie-afkNo net?  Am I missing it?
18:25.46[g2]it just a hw board
18:26.13beewoolie-afkIt's all HW boards.  It would have to use USB ethernet for getting out.
18:26.17beewoolie-afkLooks nice.
18:26.19[g2]I'm pitching to wookey_ the idea about starting a test fixture business
18:26.27beewoolie-afkNice.
18:26.42beewoolie-afkI'm making progress on the JTAG stuff.
18:26.44[g2]they'd be the alpha user
18:26.51wookey_better url for balloon is http://balloonbaord.org/
18:26.56wookey_better url for balloon is http://balloonboard.org/
18:27.49prpplaguehehe
18:28.02wookey_hi beewoolie-afk who are you?
18:28.16wookey_a man who knows about jtag?
18:28.18beewoolie-afkSorry...
18:28.37wookey_not afk :-)
18:28.38prpplague[g2]: that page is linked from the aleph1 site anyeay
18:29.00beewoolieReally, I'm ntk
18:29.02prpplaguewookey_: beewoolie currently does the sharp line of arm sdk's
18:29.26wookey_for zaurus ?
18:29.28beewoolieI got roped into this IRC by [g2] because I wrote a bootloader.
18:29.34beewooliewookey_: No, LH processors.
18:29.45prpplaguewookey_: hehe, no sharp has a line arm processors
18:29.48beewoolieIt's targeted to commercial users mostly.
18:29.48wookey_right
18:30.07beewoolieIMHO, they designed the processors to sell LCD panels.
18:30.15wookey_I didn't know about that
18:30.33[g2]it's like food at the pub
18:30.39[g2]it's designed to sell beer
18:30.48beewoolieAnd give indigestion.
18:30.54vmasterheh
18:30.58prpplaguewookey_: i work for http://www.amltd.com/
18:31.01beewoolieOK.  Salty to sell beer.
18:31.08prpplaguewookey_: we do custom handhelds and portable devices
18:31.12beewoolieNice.
18:31.40beewoolieHow much are these balloon boards?
18:32.09wookey_v2 is expensive: GBP360 in ones, about 220 in hundreds
18:32.33wookey_v3 should be less, but we're struggling to get it down to 8 layers instead of 10. proto is going to be 10
18:32.33beewooliev2 is Aleph 2.05?
18:32.39wookey_correct
18:32.45wookey_2.05g
18:32.52*** join/#openjtag prpplague (n=billybob@72.22.152.142)
18:32.54wookey_in fact is what we've made a lot of
18:33.08wookey_obvioulsy build costs depnds which options you go for
18:34.16wookey_be a lot less if you made them in china, instead of Norfolk :-)
18:34.53beewoolieI didn't realize that labor was a significant component to building boards.
18:35.09wookey_labour and plant costs
18:35.34wookey_you need an awful lot of expensive kit these days, so cost of borrowing matters I suppose.
18:35.42beewoolieI thought most folks hired-out board stuffing.
18:35.50wookey_we do
18:35.54beewoolieAt least, I did when I worked for a firm that had boards built.
18:36.16wookey_but to a fairly local outfit, who are good, but not particularly cheap
18:36.43wookey_altough simtec build their stuff in-house
18:37.03[g2]the cost of mgmt and vendor selection and time out weighs the cost of just doing it locally with a known entity
18:37.12beewoolieIs the PXA CPU expensive?
18:37.22wookey_[g2]: indeed it does, until you reach some (large) volume
18:37.30[g2]wookey_ exactl!
18:37.38wookey_beewoolie: in comparison to the samsung ones, yes
18:38.02beewoolieSharp's most expensive arm9 is about $15 IIRC.  It may be as much as $20.
18:38.27wookey_I'm not doing buying but pxa255 is somewhere in the $20-$30 range I think
18:38.27beewoolieI seem to recall it's quite affordable.  They even have one with a built-in MAC, but it's arm7.
18:39.00beewoolieI suspect that the benefit from low cost of very old ARM IP.
18:39.21wookey_v3 has tried to design out quite a lot of the cost in v2 - it'll be interesting to see how well that has gone
18:39.31beewoolieCool.
18:39.40wookey_but board is still a bit smaller than its natural size, which makes for expensive PCBs
18:39.52prpplaguewookey_: how many layers is it?
18:39.59wookey_v2 was 10
18:40.04lennert19:32 < wookey_> v3 should be less, but we're struggling to get it down to 8
18:40.04lennert<PROTECTED>
18:40.10beewoolieIs that including the raspberry layer?
18:40.21wookey_see - lennert is watching :-)
18:40.31lennertwookey_: you bet!
18:40.31wookey_I don't know what that is?
18:40.41lennerti'd prefer a whipped cream layer
18:40.55[g2]wookey_ are you doing a PXA270 on there ?
18:41.17beewoolielennert: I think you might need to learn to bake some desserts
18:41.28prpplaguelennert: thanks, i closed my irc client out earlier
18:41.31wookey_no, pxa255 - (I said above)
18:41.49[g2]wookey_ the specs still say pxa270 :(
18:41.55wookey_prpplague: ah yes - so you did - and missed that very line :-)
18:42.12wookey_oh - well in that case the spaces are probably right and I'm wrong :-)
18:43.06wookey_is that on the MDP Cambridge site?
18:43.10[g2]yeah
18:43.18[g2]no
18:43.51[g2]heh yeah http://www-mdp-eng.cam.ac.uk/about/mdp_balloon_spec.pdf
18:44.04[g2]the link comes from balloon.org
18:44.07wookey_yeah - that the best info current online
18:44.33wookey_we're just getting our finger out to fix the wiki that's been dead all year and collect the info on the site
18:44.37[g2]and the LCD interface !
18:44.56vmastermhh, that link doesn't work for me
18:45.08wookey_http://www-mdp.eng.cam.ac.uk/about/mdp_balloon_spec.pdf
18:45.18vmasterah, thx
18:45.20[g2]wookey_ thx
18:45.25wookey_(never type URLs - fatal) :-)
18:45.37*** join/#openjtag [g2-lap] (n=g2@cpe-066-057-008-035.nc.res.rr.com)
18:45.42[g2-lap]different computer
18:45.45wookey_I need to go home and tlak to the missus for 5 minutes...
18:45.47[g2-lap]not anymore
18:46.00wookey_more later
18:46.07[g2]wookey_ THX for talking with us
18:46.34prpplaguewookey_: nice to have to stop in
18:46.40prpplaguei/you
18:47.02wookey_no, I spend far too much time just talking...
18:47.16wookey_(which is very useful but doesn't get all the other things done...)
18:47.45lennertwookey_: bye
18:47.55[g2]cheers
18:48.05beewoolieBye wookey_
18:48.58[g2]Ok I'll toss this out
18:49.30lennertwhat are you tossing out? money? :)
18:49.33prpplaguewookey_: later
18:50.00prpplagueits time for those in the UK to start their friday night pub crawl anyway
18:50.06[g2]I'd know who interested in working on solving this problem of the test fixture issue
18:50.10vmasterat 18:50?
18:50.46[g2]basically it's high-speed JTAG plus netlist munger and magic
18:51.02[g2]that we could then use and sell
18:51.39beewoolieSounds like a good target.  I've been musing about what sort of pre-packaged solutions this could proved.
18:51.44beewoolies/proved/provide/
18:52.35[g2]beewoolie a friend is interested in having this problem solved and I'm interested in it too
18:52.48prpplaguevmaster: sure.....get started early
18:53.03[g2]This is the reason to focus on the high-speed JTAG
18:53.08lennert18:50 _early_ ??
18:53.14lennertwe always go to the bar at 17:00
18:53.18lennertevery single day
18:53.23prpplaguelennert: hehe
18:53.25[g2]as it's a driving cost factor in test fixture and manufacturing time
18:53.28beewoolie[g2]: I was just talking about this with ka6sox.
18:53.29lennertworkin 9 to 5, baby
18:53.56vmasterhow do you get the test vectors?
18:53.59beewoolieI think we need to come up with something that can signal up to 40MHz.
18:54.08beewoolieNone of our current designs go that fast.
18:54.18lennertvmaster: generate them from the netlist
18:54.20[g2]beewoolie ideally yes,
18:54.33[g2]I think we could start with 10Mhz
18:54.38beewoolie[g2]: I wrote a parser for BSDL files.  It isn't so useful to me at the moment, but it will make test fixtures useful.
18:54.53beewoolie[g2]: Well, we've got something like 3MHz with the ftdi chip.
18:55.06vmasterbeewoolie: not even close to that in reality
18:55.08beewoolieI've been working on the JTAG component.
18:55.11vmastermore like 1 mhz
18:55.21beewoolievmaster: with latencies?
18:55.25vmasteryeah
18:55.25[g2]That's great for initial testing
18:55.41beewoolieheck, that isn't much of an improvement over a parallel dongle.
18:55.53beewoolieI get about 264KHz out of a parallel interface.
18:55.56vmasterif all you do is scanning around the 500+ boundary scan pins and waiting for that to return you'll end up with much less
18:56.04vmasterbeewoolie: yeah, that's what i have here, too
18:56.16beewoolieThat's really disappointing.
18:56.26beewoolieIt makes the USB device far less interesting that I thought.
18:56.37[g2]ah
18:56.39lennertwhat does the xilinx platform usb cable get?
18:56.45beewoolieIn fact, it makes it not worth much effort.
18:56.49[g2]I think it's great for flashing and maybe some debug
18:56.54beewoolielennert: That's what I've been using.
18:56.55vmasterwell, it really depends on what you do with it
18:57.22beewoolieI've been using it as a platform to stand on to get JTAG code working.
18:57.28vmasterif you're able to scan a lot of data without depending on the results, you can probably go beyond 1 mhz
18:57.41vmasterbeewoolie: he's talking about the usb one
18:57.43[g2]hence the 3 MHz
18:57.50lennertmy laptop does 740k parallel port writes per second, so that's ~370kHz
18:58.03lennertbeewoolie: the platform usb one
18:58.06lennertvmaster: right
18:58.16vmasterthat comes with a ez-usb and a cpld
18:58.27lennertyeah
18:58.33[g2]3 Mhz = 6MHz / 2 for clock edges right ?
18:58.38vmastermhh, no
18:58.41beewoolieI'll suppose I'll have to see for myself what I can make it do.
18:58.42vmaster6 mhz is maximum
18:58.55lennerthttp://www.xilinx.com/xlnx/xebiz/designResources/ip_product_details.jsp?sGlobalNavPick=PRODUCTS&sSecondaryNavPick=Design+Tools&key=HW-USB
18:58.56vmasterwhat you can set the chip to
18:59.13vmasterbut with usb latencies you end up at a lot less
18:59.38beewoolieRight.  So programming flash, for example, could be quite a bit faster.
18:59.46beewoolieThan reading registers from the CPU.
19:00.08beewoolielennert: What are they selling it for?
19:00.08vmastermhh, when programming the flash you're waiting for results, too, aren't you?
19:00.16beewoolieNot necessarily.
19:00.18lennertbeewoolie: $150 ?
19:00.26beewoolielennert: K.
19:00.29lennertbeewoolie: ridiculously overpriced if you ask me
19:00.36beewoolieIt depends on the method.
19:00.39lennertbeewoolie: but hard to do it cheaper on your own
19:00.39prpplaguebeewoolie: depends on the process
19:00.53beewooliebeewoolie: The ep1220 board is going to be about $50.
19:01.02prpplaguebeewoolie: i usually program all the data, then go back and verify
19:01.16beewoolielennert: er, yeah.  ep1220's board is about that in parts.
19:01.36lennertbeewoolie: $150 ?
19:01.43vmasterprpplague: don't you have to wait for the flash state machine to complete the last cycle?
19:02.22vmasteryou could pretend that the flash is always fast enough, but at 6mhz that _could_ not hold true
19:02.24beewoolievmaster: it depends on the way that the program data is stored.
19:02.44beewoolieIt could setup SDRAM and store the data there while programming.
19:02.45prpplaguevmaster: using a parport we don't have to worry about that, i've never had a timeout
19:02.54vmasterheh, yeah, not on the parport
19:03.00vmasterbut on the ep1220 for example
19:03.17lennertcan you read from sdram via jtag at all?
19:03.24lennertwon't the ddr be a problem?
19:03.37vmasterlennert: i guess he's talking about using the processor to do the flashing
19:03.57vmasteri.e. copying the flash algorithm to the target ram, and let it run from there
19:04.04beewoolieright.
19:04.08vmasterbut that's not where g2 is going
19:04.09prpplagueyea you;d have to do it through the processor
19:04.11beewoolieActually, the code could be in cache.
19:04.13lennertright..
19:04.31lennertyou'd need the cpu to access ram
19:04.46beewoolie[g2]: I thought that you were interested in verification.  flashing is a secondary goal.
19:05.07vmasteri guess g2 wants to do flashing the "openwince" way
19:05.09beewoolie[g2]: Perhaps, it's fast flashing that is the secondary goal.
19:05.25beewoolieka6sox would disagree
19:05.36beewoolieouch.
19:06.07lennertopenwince does cpu pin toggling?
19:06.16vmasteryeah
19:06.21beewoolieouch.
19:06.26lennertthat's Evil
19:06.37lennertand un-'portable'
19:06.39beewoolieNaive
19:06.47lennert(whatever 'portable' means in this context)
19:06.48vmasteryeah, but it allows you to support ANY target processor as long as you have a bsdl file
19:07.06beewoolieTrue.
19:07.23beewoolieIt's clearly a good solution of last resort for that fact.
19:08.03prpplaguevmaster: hehe and accurate bsdl file
19:08.09prpplagues/and/a
19:08.15vmasterheh, yeah
19:08.18beewoolieprpplague: You got that right.
19:08.20vmasterwell, bsdl is like black magic to me
19:08.33vmasterit seems so overly complicated
19:08.38beewoolieCrummy syntax.
19:08.45beewoolieReminds me of SGML.
19:09.27beewoolieI wrote a parser for it, but it isn't sufficient because a lot of the data is held in strings within the BSDL structure.  Those strings must then be parsed.
19:09.34vmasterhehehe, yeah
19:09.42vmasteri have someone doing this for me
19:09.45vmasterwriting the bsdl parser
19:09.55vmasteri guess he's done with the parsing part
19:09.59vmasterincluding parsing the strings
19:10.12vmasterand he cursed about these strings for days, if not weeks
19:10.13[g2]beewoolie there are several goals
19:10.36[g2]I'm no test fixture expert (yet heh) but time is important all around
19:11.09vmasterwhat does such a test look like?
19:11.39[g2]I think we have the opportunity to become the enablers for small board manufactures to scale better or produce much higher quality products
19:11.46[g2]i.e. they are actually verified
19:12.11vmasteri've seen some videos on the macraigor site where they demonstrated their jtag software, but what they did seemed rather limited
19:12.43[g2]vmaster wookey_ mentioned borrowing the XJTAG for the post-production build
19:13.06[g2]I'll be looking at www.xjtag.com as they may provide a lot of information
19:13.29lennertlooking at it naively.. i would try to test all nets for 0 and 1
19:13.31[g2]I'm gonna start writing up some information about this and what's needed
19:13.37lennert(except the nets that are hooked to gnd/vcc directly)
19:13.47lennertso.. inject data from each of the source pins
19:13.52lennertand test on each of the destination pins
19:14.01lennertbut that's probably very naive
19:14.05lennert[g2] :)
19:14.11[g2]actually I think you want to interpret the netlist
19:14.15vmasterwell, yeah, but you can only check those nets that are connected to two jtagged devices
19:14.20vmasterlike, a uC and the fpga
19:14.21lennert[g2]: yup
19:14.28lennert[g2]: generate the vectors from the netlist
19:14.33lennert[g2]: iterate over the netlist, test each net
19:14.35[g2]and check stuff like all the grounds are tied together and now are tied to VCC
19:14.53lennertnot sure whether you can test vcc and gnd continuity.. ?
19:15.02lennertvmaster: indeed, otherwise it's no use
19:15.33lennertwell, in the second stage, you can add some intelligence like testing simple combinatorial logic devices and/or flipflops
19:15.39lennertbut doing that from the netlist is harder
19:15.52[g2]vmaster this is where your understanding of JTAG may be very helpful
19:15.55lennertso, if you have an octal flipflop, and all input/output pins go to jtag-accessible devices, for example
19:16.22[g2]I think we need to talk about different models such as a single device on the chain and multiple devices on the chain
19:16.39lennerta friend of mine had a board with a broken pullup, where changing the state of a pin needed 3 seconds to propagate
19:17.20beewoolielennert: Great test case.
19:17.20[g2]right, I want to verify all the pullup/pull downs to the processor config lines
19:17.40[g2]and by knowing the chip and the netlist and config I think you could test that
19:17.45vmastermhh, okay, but is this something you can identify by just looking at the netlist?
19:18.03[g2]it's not a simple problem
19:18.05prpplague[g2] yea thats one of core items for jtag purpose
19:18.22[g2]prpplague yeah I think this is done is spades
19:18.58lennertgenerating as much test patterns as possible is key, i think
19:19.03lennerts/much/many/
19:19.19lennertusing all the info you have
19:20.23lennertlet's see if wookey sends that netlist
19:25.12[g2]We can start with and old B2 netlist
19:25.19[g2]s/and/as/
19:25.24[g2]s/as/an
19:25.27[g2]s/as/an/
19:25.33[g2]heh
19:25.39[g2]We can start with an old B2 netlist
19:26.13[g2]wookey_ may have some B2 boards around maybe even broken ones and they'd be best as we could determine what was hosed
19:33.44*** join/#openjtag ep1220 (n=NN@gate.epatec.at)
19:34.04beewoolieep1220: hey.
19:34.11ep1220hey beewoolie
19:34.26prpplagueep1220: hey is for horses
19:34.46beewoolieprpplague: what are you, 60 years old?
19:35.38prpplaguebeewoolie: i feel that old
19:36.25prpplaguegotta head out , later folks
19:36.35beewoolielater...
19:38.06ep1220beewoolie: keeping the CPU in rest while the cache is loaded, is what i referred to.
19:38.06ep1220keeping the CPU in rest while the cache is loaded, is what i referred to.
19:38.07ep1220keeping the CPU in rest while the cache is loaded, is what i referred to.
19:38.09ep1220keeping the CPU in rest while the cache is loaded, is what i referred to.
19:38.11ep1220beewoolie: to answer Your e-mail
19:38.21beewoolieRight.
19:38.29beewoolieBTW, you don't need to shout.
19:38.32beewoolie:-)
19:38.39ep1220sorry, i know 1 time is enough
19:38.41beewoolieI'm glad to know I was wrong.
19:39.02beewoolieep1220: What kind of performance are you seeing?  Can you qualify/quantify?
19:40.25ep1220When I send commands to the FTDI backto back I can approach 4.5Mbit effective TCK rate
19:40.57ep1220TCKis set to 6Mhz, but the FTDI adds some pauses between every 8 databits
19:40.59ka6sox-officehi ep1220
19:41.06ep1220ka6sox-office: Hi
19:41.09ka6sox-officeI"m back from moving and other maladies
19:41.20beewoolieka6sox-office: hey
19:41.22ka6sox-officemy board is working wonderfully;)
19:41.29ka6sox-officehiya beewoolie
19:41.53ep1220I'm back from holidays :-)
19:41.58beewoolieep1220: Can you write to flash as fast as the device can be programmed?
19:43.15ep1220I have not tried flash programming so far
19:44.39ep1220If You do progarmming thru the JTAG chain, it is not possible.
19:44.58beewoolieep1220: it is not possible to do what?
19:45.15ep1220to prog as fast as the device allows
19:46.34beewoolieSo, the answer is kinda-yes.  The JTAG is slower than the flash device when programming.  
19:47.04beewooliewhat have you done with your cache-loaded code/
19:47.54ep1220It just turned on/off one of the LEDs.
19:48.01beewoolie:=)
19:48.08beewoolieNice.
19:48.46beewoolieit would be really handy if we could tell the compiler to produce code that doesn't perform data loads for constants.
19:48.59ep1220well, easiest way to verify the prog i downloaded does what it is supposed to ;-)
19:49.42ka6sox-officeback in 2hrs
19:49.54beewoolieka6sox-office: later.
19:49.54ep1220having a compiler with that option would be great
19:50.36beewoolieI've been contemplating what it would take to write something of size without pc relative loads.
19:51.07beewoolieI may just have to use some macros to handle 32 bit constants.
19:51.34[g2]ep1220 happy new year
19:52.39ep1220[g2]: Thank You; hope you have a great year too
19:53.44ep1220beewoolie:  I believe writing a flash program in assembly should be possible as well
19:53.57beewoolieI'm working to get there.
19:54.15beewoolieI want to use the DCC port to send the data.
19:55.02vmasterbeewoolie: the dcc is of limited use with the ft2232c
19:55.06vmasterbecause of the latency
19:55.32beewoolieThat depends on how it is used.
19:55.36beewoolie;-)
19:55.43ep1220vMaster: No, you do not need to handshake every word
19:56.03vmastermhh, at 6mhz you could outrun the target, couldn't you?
19:56.06ep1220the CPU is a lot faster than the 4 or 5Mbit/sec
19:56.20beewoolieIf the jtag is slower than the flash device, there is no need to wait.
19:56.32beewoolieMoreover, there are lots of way to buffer data so that it is efficient.
19:56.40vmastera atmel at91 might be running from a 32khz clock
19:57.03beewoolieExceptions just make the task more interesting.
19:57.55*** join/#openjtag velinp (n=velinp@c88-163.cable.netissat.bg)
20:00.03velinphi. may I collect wisdom here? :)
20:00.18beewooliePut the money on the barrelhead.
20:01.26beewoolie:-)
20:02.43velinpnothing for free, eh :)
20:03.01beewoolieAll depends on what you want?  Advice is really cheap/.
20:04.30velinpwell, I was thinking about fattening an NSLU2 (32M now). It seems safer to add another 32MB than cleanup and go the 256MB way. what do you think?
20:06.09beewoolieI've never done either.  I know that the openslug web site has some info about it.
20:07.34[g2]ep1220 it's nice to see you again
20:08.28velinpbeewoolie: yes, I saw it; thought someone of you guys did it; sorry if I was wrong.
20:08.59beewoolieI believe that ka6sox-office has done this at least once.  rwhitby as well.
20:10.39ep1220[g2]: hows Your Loft coming along ?
20:13.20velinpbewoolie: thanks; may I have ka6sox-office e-mail as rwhitby seems quite busy; I've tried ka6sox@gmail.com and tking@websb.net - no answer.
20:17.53beewoolieThat's not something that we do here.
20:18.07beewoolieIf they choose to be unavailable, that's their choice.
20:18.29velinpI see; sorry I asked
20:20.02[g2]ep1220 Great thx. They are pretty much in production now
20:20.19[g2]I've got about a 12 dozen left and 100 being built
20:20.54ep1220[g2]: congrats
20:20.57lennertre
20:21.01lennertdamn internet died on me again
20:21.13[g2]ep1220 thx
20:21.30[g2]I've been hearing cool things about your board
20:21.41[g2]lennert wb
20:21.50lennertthanks
20:22.30velinphi, lennert; remember me? (aug/sep '05)
20:23.13ep1220[g2]: Good :-), i am not up-to-date with what happened here.
20:23.14ep1220<PROTECTED>
20:23.48lennertvelinp: yup, the bulgarian guy.
20:24.23velinpyes, I am; go offline?
20:24.48lennertwhat?
20:24.53lennertme, go offline?
20:24.55lennertwhy?
20:24.56lennert:)
20:25.18velinpno, I meant not to bother the rest
20:25.58lennertyou're not bothering?
20:28.30velinpok, I go on; I have an armeb-buildd (by wouter) on my slug and am looking for help about adding ram to it;
20:29.00lennerti can't provide you that help personally, i'm afraid
20:31.05velinpanyway, thanks. it was a pleasure to meet you here; and i'm a complete newbie to irc.
20:32.19lennertwell, feel free to hang around
20:32.29lennertka6sox may come back soon and give you some help
20:33.04velinpok, thanks; i now go into readonly mode
20:33.23lennertokay
20:33.32lennertwe talk about interesting stuff here all the time :)
20:39.19vmasterwe do?
20:41.44lennertvmaster: only when you're asleep, though
20:51.36[g2]anyone know what SVF and STAPL files are ?
20:54.41velinpseems xilinx related; see http://toolbox.xilinx.com/docsan/xilinx7/help/iseguide/mergedProjects/dkxilinx/html/pp_process_generate_svf_file.htm
20:58.46lennertSVF has instructions for a jtag player
20:58.52lennertXSVF is the binary version
20:59.21lennertvmaster is the expert on this
20:59.32[g2-lap]lennert can you take a look at http://www.xjtag.com/docs/XJTAG_data_sheet.pdf
21:01.33lennertlooking
21:02.25lennertkind of what i had in mind
21:02.43[g2]yeah me too
21:02.45lennertbut they also have something to control pins by hand
21:03.05lennerti was thinking of doing something that does everything automaticaclly first
21:03.14[g2]and a runner (production version) versus development version
21:03.26lennerti suck at GUIs
21:03.46[g2]we don't need you to do GUIs
21:03.47lennertGUIs are _hard_ to get right
21:04.08[g2]they are _hard_ to look right
21:05.59wookey_[g2-lap]: yes I have a few broken balloon 2 boards
21:06.31[g2]wookey_ they'd make for good test kit no ?
21:07.21[g2]wookey_ can you fill me in on the Cambridge Technology Group ?
21:07.32[g2]are they spinoffs from Cambridge ?
21:10.00wookey_[g2-lap]: playxsvf is the player xilinx probvide to inject code into their devices
21:10.07wookey_it the binary version of svf
21:10.15wookey_those files are compiled from thre .jed files
21:10.25lennert.bit for fpgas
21:10.59wookey_cambridge technology group - wher is the reference?
21:11.54wookey_btw lennert you were tsalking about patterns above - an important one is checking for shorts by setting adjacent wires to opposite state
21:12.25wookey_I should try and get our JTAG expert on here, but I don't knwo if he does IRC
21:12.29[g2-lap]wookey_, bottom right hand corner it's three companies http://www.xjtag.com/xjanalyser.php
21:12.44wookey_and he'll probably just say 'but XJTAG is bbloody marvellous - just use that'
21:12.57lennertwookey_: if there's a short and you drive opposite values you can blow up output buffers..
21:13.38wookey_hmm - well - I understnad it's something xjatg does, and we did when we wrote code to acheive the same job in pre-jtag days
21:14.02wookey_their interface is good too - shows you a pic of the chip and you can double click on a pin to change it's state
21:14.11wookey_very useful when you are scoping round a board
21:14.13lennertyou can perhaps configure the adjacent pin as an input..
21:15.12wookey_lennert: if the short is going to break the hardware then it will do it when you turn it on if XJTAG doesn't spot it first, I woulod have thought - so you don't lose anything?
21:15.52lennertwookey_: but you'd like to find it before you turn it on, and possibly desolder the component if you can, i think?
21:16.30wookey_[g2-lap]: I haven't come across the CTG before, but they are obviously local
21:17.20[g2]wookey_ I was guessing it might be associated with the uni but it's just the name
21:17.38[g2]crafty name at that :)
21:17.47wookey_yeah, there are an awful lot of companies with 'cambridge' in the name, including some in the US
21:18.07wookey_Quite a few are founded by ex-university people
21:18.10[g2]Cambridge Triangle Research :)
21:18.24[g2]or RTC
21:18.31lennertreal time clock? :)
21:18.31[g2]instead of RTP
21:18.38lennertreal time protocol
21:18.52[g2]Research Triangle Park  near me :)
21:18.57[g2]NC
21:27.28AchiestDragonok so they offer a free 15 day trial but dont tell you how much it is
21:29.40lennertAchiestDragon: 'free'? :)
21:29.48lennertit's probably one of those..
21:29.54lennert"if you have to ask you can't afford it" things
21:30.35AchiestDragonwell guess thay would charge you interest for the free trial in the price when you pay for it
21:32.51beewoolieWhat does the real deal cost?
21:33.11lennertAchiestDragon: they probably use the free trial to see how interested you are and charge you accordingly
21:33.19beewoolie[g2]: BTW, I added MMU support to APEX for Voodoo_Z.  If it works, it will make booting from Jffs2 much faster.
21:33.32[g2]beewoolie cool
21:33.48[g2]redboot to ramdisk is lighting on the Loft
21:33.56vmasterbeewoolie: Macraigor J-Scan is very similar, and costs 1895$
21:33.58[g2]I think it's under 10 seconds
21:34.21beewoolie[g2]: redboot uses the MMU.  Once it is enable on APEX, it should be the same speed.
21:35.26beewoolievmaster: That doesn't seem to be unreasonable.
21:35.59[g2]beewoolie probably a little faster with APEX
21:36.12vmasterbeewoolie: their usbdemon is a ft2232c
21:36.24vmasterbeewoolie: and the usbdemon is 750$
21:36.27[g2]I'd like to get APEX running on the board, but there's 16MB NOR
21:36.49[g2]beewoolie I think wookey_ commented something about thousands of pounds
21:37.11beewoolie[g2]: How does the larger NOR flash change things?
21:37.35beewoolievmaster: OK, that's way too much for the hardware.
21:38.22AchiestDragonok , couple of questions , as im new to the chan to try and find out if this is going to be sutable
21:39.14[g2]beewoolie right this second a small footprint bootloader isn't as necessary
21:39.29[g2]AchiestDragon shoot
21:39.39AchiestDragoni have a arm based board , and am building a fpga based expantion for it , i want to be able to program the device when needed using the arm cpu prefreablay by jtag
21:39.43beewoolie[g2]: Indeed.  But the point of APEX wasn't just small.
21:39.49beewoolie[g2]: ...-ness.
21:40.46AchiestDragonthe arm board is a ts7200 by http://www.embededarm.com and the fpga is a cyclone2
21:41.06beewoolieAchiestDragon: seems like a reasonable goal.
21:41.08[g2]ep9302
21:41.12[g2]processor
21:41.16AchiestDragonyes
21:41.31[g2]I've got two
21:42.07[g2]they don't bring out JTAG
21:42.29[g2]and their very low-level boot isn't open
21:42.47lennerti think he wants to use gpios
21:42.57lennerthe wants to program _another_ device using the ep9302
21:43.11AchiestDragonthe jatag on there board only provides connection to the xilinx fpga that they use for decode,
21:44.01beewoolieAchiestDragon: my intuition is that you aren't going to get much out of JTAG'n this thing.
21:44.02AchiestDragonthe board i am building is a pc/104 board , and was goingto use the ts7200 dio to do the jtag host
21:44.25AchiestDragonjust need to program the device
21:44.28beewoolieAchiestDragon: You're better off writing code for the device and handling the work there.  You can use a serial port, for example, for comm.
21:44.44beewoolieWhy?
21:45.01beewoolieI mean, are you talking about performing a JTAG emulation in software?
21:45.24AchiestDragonalthough i am interested in linux based software for jtag for other uses also , if i dont have to spend lots of $ on adaptors
21:45.27lennerthe wants to program an fpga
21:45.33lennertwith a cirrus arm cpu
21:45.37lennertcause the fpga is on the daughterboard
21:45.46lennertto program the fpga, he needs jtag
21:45.50lennertas far as i understood
21:45.53AchiestDragonyes
21:46.00beewoolieOh.  I see.  He wants code on the CPU to run jtag on the FPGA.
21:46.20lennertyes
21:46.30beewoolieWell, at the moment, there is code in the form of openwince's jtag, vmaster has some ftdi code, and there are a few others lying around
21:46.49beewoolieJTAG isn't that complex.
21:47.02beewoolieThe closest to what you need is in the openwince code, but that requires an OS.
21:47.31beewoolieI've been hacking at some code to handle the JTAG operations.  It's far from the level that you need.
21:47.36AchiestDragonthe arm cpu is runing debian linux
21:47.48beewoolieIf that's the case, the openwince code should suffice.
21:47.59beewoolieYou'll have to write a driver to handle the lowest level IO.  
21:48.35beewoolieOnce you get the code to program the FPGA from your PC, only that lowest level IO part needs to be written.
21:48.54lennertprobably just toggling some GPIOs
21:48.58beewoolieRight.
21:49.27beewoolieIt's just a matter of implementing to their API.  I haven't spent much time reading their code, so I cannot speak to the difficulty.
21:49.38beewoolieI believe you'd just have to implement a new 'cable'.
21:50.01beewoolieThe parallel devices are already pretty close to that you'll need.
21:50.06AchiestDragoni have some code that will do the job , but its not oss so it would preclude distributing it , as the fpga card is intended to be a openhardware project it needs some oss tools
21:50.35beewoolieSo, you already know how to do the work.
21:50.59AchiestDragonwell im better at hardware than software
21:51.16AchiestDragonbut could manage the driver
21:55.09AchiestDragoni gather from the chan topic that this chan is for software that is still in early development
21:55.50lennertyeah
21:55.56AchiestDragonk , kool
22:08.54*** part/#openjtag ep1220 (n=NN@gate.epatec.at)
22:55.38*** join/#openjtag ka6sox (n=ka6sox@nslu2-linux/ka6sox)
23:14.06*** join/#openjtag bullet (n=bullet@248.215.62.81.cust.bluewin.ch)

Generated by irclog2html.pl by Jeff Waugh - find it at freshmeat.net! Modified by Tim Riker to work with blootbot logs, split per channel, etc.