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| 01:39.01 | jonpry | Cotulla, for me it always happens like this |
| 01:39.02 | jonpry | do_trap0 98 |
| 01:39.02 | jonpry | Kernel panic - not syncing: Unrecognized trap0 0x10 ssr=0x00c20010 r6=0x00000000 |
| 01:39.24 | jonpry | i added code to do_trap0. to catch pt_cause(regs) with strange values |
| 01:39.32 | jonpry | 98 is futex |
| 01:39.43 | jonpry | and wtf happened to ssr! |
| 01:40.14 | jonpry | it seems to happen on every syscall 98 |
| 01:40.29 | jonpry | that syscall does not always happen however |
| 01:42.56 | jonpry | ghosts in the machine |
| 01:50.44 | detule | hey jonpry you got a second |
| 01:54.34 | jonpry | sure whats up |
| 01:55.15 | detule | so i am looking at this 8960 clock dsi1_byte_clk |
| 01:55.43 | detule | it's sourced through some PLL ( DSI PHY PLL) |
| 01:56.32 | detule | anyways, if i change the divider from 4 to 2, because i want the clock to run at a higher rate, am i somehow increasing power consumption |
| 01:56.53 | detule | i want to say no because that crystal still keeps oscilating at the same rate right? |
| 01:57.17 | detule | i am just changing the output divider |
| 01:57.37 | jonpry | it will increase power used by whatever fabric is being clocked |
| 01:57.57 | jonpry | which is probably a very small piece of silicon |
| 01:59.26 | jonpry | if you actually increasing the speed of the external DSI interface you might have bigger problems |
| 02:00.33 | detule | well the current 3.0 s3 CM kernel has this serious panel flicker .... they've patched this by doing some crazy things with the axi bus scaling with some crazy multipliers |
| 02:00.51 | detule | anyways, I can fix it by just changing the divider of the dsi clock |
| 02:01.14 | detule | it's more elegant, but I am not sure if it's a more power efficient solution than what kondik is doing with the axi bus |
| 02:01.38 | jonpry | clocking AXI uses a whole mess of power |
| 02:01.51 | jonpry | that thing is connected to almost the whole chip |
| 02:02.12 | jonpry | which is why there is so much code to scale AXI based on need |
| 02:02.44 | detule | right, they're multplying only the panel bus handle |
| 02:03.03 | detule | but i still think that's an overkill |
| 02:03.19 | jonpry | i'm not sure what that means |
| 02:03.29 | jonpry | afaik there is only one chip wide AXI clock |
| 02:04.07 | detule | right, but there's any device can take out a bus scaling client and work with that as it needs to, but you are right as soon as the video driver makes bus adjustments that's for the entire bus |
| 02:05.27 | jonpry | i would say that dsi clock would use way less power. unless it changes the external interface somehow |
| 02:19.49 | detule | thanks jonpry |
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| 11:38.42 | *** topic/#htc-linux is Welcome to the HTC Linux project | Community portal & WiKi http://htc-linux.org | For IRC logs, HaRET & kernel mailing lists etc. see http://htc-linux.org/wiki/index.php?title=Contact | The htc-linux.org project is not affiliated with the HTC Corporation | This channel is for development purposes - Join #htc-linux-chat for offtopic |
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| 13:31.21 | Cotulla | no jonpry I dont' have that problem |
| 13:31.24 | Cotulla | all pids are ok |
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